The present invention is directed to integrated circuits. More particularly, the invention provides systems and methods for primary-side sensing and regulation. Merely by way of example, the invention has been applied to a flyback power converter. But it would be recognized that the invention has a much broader range of applicability.
Primary-side sensing and regulation is widely used in flyback power converters for small power applications such as chargers. A flyback power converter often includes a primary winding and a secondary winding that is associated with the output voltage of the converter. With primary-side sensing and regulation, the output voltage usually is sensed by detecting the voltage of an auxiliary winding that is tightly coupled to the secondary winding. Since the voltage of the auxiliary winding images the output voltage that is associated with the secondary winding, the voltage sensed in the auxiliary winding can be utilized to regulate the secondary-side output voltage.
FIG. 1 is a simplified diagram showing a conventional switch-mode flyback power conversion system with primary-side sensing and regulation. The flyback power conversion system 100 includes a transformer 110, a power switch 120, a sensing resistor 130, a cable resistor 140 that represents the equivalent resistance of output cables, a sample and hold component 180, an error amplifier 182, a loop compensation network 184, a PWM/PFM signal generator 186, a logic control component 188, and a gate driver 190. Additionally, the transformer 110 includes a primary winding 112, a secondary winding 114, and an auxiliary winding 116. Also, the flyback power conversion system 100 includes resistors 170 and 172, diodes 160 and 168, and capacitors 196 and 198. For example, the loop compensation network 184 is also called a compensation network. In another example, the loop compensation network 184 includes a loop filter.
As shown in FIG. 1, the power conversion system 100 generates an output voltage 142 at an output terminal, which is received by an output load 150. In order to regulate the output voltage 142 within a desirable range, the information related to the output voltage 142 and the output load 150 needs to be extracted for control purposes. Such information can be extracted with the auxiliary winding 116 under discontinuous conduction mode (DCM).
Specifically, when the power switch 120 is closed, the energy is stored in the transformer 110. Then, when the power switch 120 is opened, the stored energy is delivered to the output terminal, and the output voltage 142 can be mapped by the auxiliary voltage 118 of the auxiliary winding 116. For example, the auxiliary voltage 118 and the output voltage 142 has the following relationship:Vaux=n×(Vo+VF+Io×Req)  (Equation 1)
where Vaux represents the auxiliary voltage 118, Vo represents the output voltage 142, and VF represents the forward voltage of the diode 160. Additionally, Io represents the output current corresponding to the output voltage 142. The output current is also called the load current. Moreover, Req represents the resistance of the output cable resistor 140. Also, n represents the turn's ratio between the auxiliary winding 116 and the secondary winding 114, and n is equal to Naux/Nsec. Naux represents the number of turns for the auxiliary winding 116, and Nsec represents the number of turns for the secondary winding 114.
As shown in FIG. 1, the auxiliary voltage 118 is received by a voltage divider including the resistors 170 and 172, which converts the auxiliary voltage 118 into a feedback voltage 174.VFB=k×Vaux=k×n×(Vo+VF+Io×Req)  (Equation 2-1)k=R2/(R1+R2)  (Equation 2-2)
where VFB represents the feedback voltage 174, and k represents the feedback coefficient. Additionally, R1 and R2 represent the resistance of the resistors 170 and 172 respectively.
FIG. 2 is a simplified diagram showing conventional waveforms for the feedback voltage 174 and the secondary current that flows through the secondary winding 114. As shown in FIG. 2, VFB and Isec represent the feedback voltage 174 and the secondary current respectively. Additionally, ton represents the time period when the power switch 120 is closed, and toff represents the time period when the power switch 120 is turned off. Moreover, tDemag represents the time period of the demagnetization process.
Referring to both FIGS. 1 and 2, the feedback voltage VFB is received by the sample and hold component 180. Near the end of the demagnetization process, the secondary current that flows through the secondary winding 114 becomes close to zero. At this time, the feedback voltage VFB is sampled, for example, at point A in FIG. 2. The sampled voltage VA is then held by the component 180 until the next sampling.
The sampled voltage VA is received by an error amplifier 182, which compares the sampled voltage VA and a reference voltage Vref, and also amplifies the difference between VA and Vref. The error amplifier 182, together with the compensation network 184, sends one or more output signals 185 to the PWM/PFM signal generator 186. For example, the compensation network 184 includes a capacitor. In another example, the PWM/PFM signal generator 186 also receives a sensing voltage 132 from the sensing resistor 130, which converts the primary current that flows though the primary winding 112 into the sensing voltage. In response, the PWM/PFM signal generator 186 outputs a modulation signal 187 to the logic control component 188, which sends a control signal 189 to the gate driver 190. In response, the gate driver 190 sends a drive signal 192 to the power switch 120.
Hence, as shown in FIG. 1, the output signals 185 are used to control the pulse width or the switching frequency of the drive signal 192, and thus control the output voltage 142. For example, one of the output signals 185 is associated with a compensation voltage Vcomp. In another example, FIG. 3 is a simplified diagram showing the compensation voltage Vcomp as a function of the output current Io, which is also called the load current.
Specifically, the negative feedback loop is used to regulate the output voltage Vo by regulating the sampled voltage VA so that VA becomes equal to the reference voltage Vref. Hence,Vref=k×n×(Vo+VF+Io×Req)  (Equation 3)
Therefore,
                              V          o                =                                            V              ref                                      k              ×              n                                -                      V            F                    -                                    I              o                        ×                          R              eq                                                          (                  Equation          ⁢                                          ⁢          4                )            
Since the output voltage Vo is regulated by the negative feedback loop, it is often important to keep the loop stable at all input voltages for all the load conditions. Also, the feedback loop often needs to exhibit the good dynamics.
As shown in FIG. 1, for the power conversion system 100, the feedback loop includes at least the control stage and the power stage. For example, the control stage includes at least part of the error amplifier 182, the loop compensation network 184, and the PWM/PFM signal generator 186. In another example, the power stage includes at least the logic control component 188, the gate driver 190, and certain components between the gate driver 190 and the output terminal for the output voltage Vo.
The overall transfer function of the forward path is determined by the transfer function of the control stage and the transfer function of the power stage. For the power conversion system 100, the transfer function of the power stage is:
                                          Z            power                    ⁡                      (            s            )                          ≈                                            V              o                        D                    ×                                    1              +                                                R                  esr                                ×                                  C                  o                                ×                s                                                    1              +                                                                                          R                      o                                        ×                                          C                      o                                                        2                                ×                s                                                                        (                  Equation          ⁢                                          ⁢          5                )            
where Ro represents the output resistance, Co represents the output capacitance, and Resr represents the resistance that is in series with the output capacitance. Additionally, s equals jω, and ω is the angular frequency, often simply called frequency. Moreover, D represents the duty cycle of the modulation signal 187.
Based on Equation 5, the pole location in the frequency domain for the power stage is:
                              ω                      p            ⁢                                                  ⁢            1                          =                  2                                    R              o                        ⁢                          C              o                                                          (                  Equation          ⁢                                          ⁢          6                )            
Hence, for a given Co, the frequency of the pole location changes with the output resistance Ro. Additionally, the zero location in the frequency domain for the power stage is:
                              ω                      z            ⁢                                                  ⁢            1                          =                  1                                    R              esr                        ⁢                          C              o                                                          (                  Equation          ⁢                                          ⁢          7                )            
Usually Resr is very small, so ωz1 often is much larger than ωp1.
FIGS. 4 and 5 each show a simplified conventional bode plot for the power stage of the flyback power conversion system 100.
As discussed above, the power stage and the control stage are parts of the forward path of the feedback loop. The feedback loop can be characterized by stability and dynamics, both of which are often important for primary-side sensing and regulation of the flyback power conversion system.
Hence it is highly desirable to improve the techniques of primary-side sensing and regulation.